1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a semiconductor device having a capacitor.
2. Description of the Background Art
Conventionally, a semiconductor device such as a DRAM (Dynamic Random Access Memory) is known. FIG. 21 is a schematic cross-section view showing the conventional semiconductor device. FIG. 21 illustrates a cross section of a capacitor portion for storing electric charge, in a DRAM shown as the conventional semiconductor device. The conventional semiconductor device will be described with reference to FIG. 21.
As shown in FIG. 21, a semiconductor memory device 101 represented as a conventional semiconductor device includes field effect transistors (not shown) formed on a main surface of a semiconductor substrate 102, and capacitors electrically connected to source/drain regions of the respective field effect transistors. The main surface of semiconductor substrate 102 includes a memory cell region in which the field effect transistors and capacitors described above are formed, and a peripheral circuit region in which e.g. a circuit for controlling input to/output from elements formed in the memory cell region are arranged. An isolation insulation film 103 is formed to enclose active element regions on the main surface of semiconductor substrate 102. In the active element regions enclosed by isolation insulation film 103, nxe2x88x92 type diffusion regions 104 are formed, respectively, on the main surface of semiconductor substrate 102. Each of the nxe2x88x92 type diffusion regions 104 is electrically connected to the source/drain region of the corresponding field effect transistor.
An interlayer insulation film 105 is formed on the main surface of semiconductor substrate 102. In interlayer insulation film 105, contact holes 106 are formed in regions located above respective nxe2x88x92 type diffusion regions 104. A plug 107 formed of n type polysilicon is arranged to fill in each contact hole 106. A nitride film 108 is formed on interlayer insulation film 105. An oxide film 109 is formed on nitride film 108. In a region located above each plug 107, oxide film 109 and nitride film 108 are partially removed to form an opening 110 in which a capacitor is disposed.
A lower capacitor electrode 111 is formed on the bottom and side walls of opening 110.
A dielectric film 113 of a nitride film is formed on lower capacitor electrode 111. An upper capacitor electrode 114 is formed on dielectric film 113. An interlayer insulation film 115 is formed on upper capacitor electrode 114. In interlayer insulation film 115, a via hole 116 is formed at a region located above an end of upper capacitor electrode 114. A plug 117 made of a conductive material is disposed within via hole 116. At a region located above plug 117, an aluminum interconnection 118 is formed to extend on the top surface of interlayer insulation film 115. Aluminum interconnection 118 is electrically connected with plug 117. Plug 117 in turn is electrically connected with upper capacitor electrode 114. Lower capacitor electrode 111, dielectric film 113 and upper capacitor electrode 114 constitute a capacitor of a memory cell. It is noted that lower capacitor electrode 111 must be electrically insulated from the adjacent lower capacitor electrode 111, since each capacitor stores 1-bit information.
However, the conventional semiconductor device described above had the following problems. In the step of manufacturing the semiconductor device shown in FIG. 21, such a failure may occur that adjacent lower capacitor electrodes 111 are short-circuited, as will be described later. Brief description of the step of manufacturing the lower capacitor electrode in the manufacturing process of the conventional semiconductor device is provided below.
First, elements such as field effect transistors and the like are formed on the main surface of semiconductor substrate 102 using a common method. Thereafter, interlayer insulation film 105, plug 107 filling in contact hole 106, nitride film 108 and oxide film 109 are formed. Next, oxide film 109 and nitride film 108 are partially removed by etching or the like, to form opening 110. Subsequently, a doped polysilicon film (not shown) which is to be lower capacitor electrodes 111 is formed to extend from the inside of opening 110 to the top surface of oxide film 109. Then, portions of the doped polysilicon film that are present on oxide film 109 are removed by etching or the like. As a result, lower capacitor electrodes 111 isolated from one another can be formed.
However, as shown in FIG. 22, at the above-mentioned step of etching the doped polysilicon film, a portion of the doped polysilicon film to be removed (a short-circuiting portion 130 that electrically connect adjacent lower capacitor electrodes 111a and 111b) sometimes remains even after the partial etching, due to a foreign particle present in that portion. As a result, the adjacent lower capacitor electrodes 111a and 111b are short-circuited. Note that FIG. 22 is a schematic cross-section view for illustrating the problems in the conventional semiconductor device.
Even if short-circuiting portion 130 as described above is formed, such short-circuiting portion 130 can rather easily be detected by a wafer test during the manufacturing process. Accordingly, a memory cell including such short-circuited lower capacitor electrodes 111a and 111b can be replaced with a redundant memory cell that was prepared in advance. However, such a replacement work leads to increase in the number of manufacturing steps, resulting in higher manufacturing cost of a semiconductor device.
Moreover, in the above-described etching step of the doped polysilicon film, even if the adjacent lower capacitor electrodes 111a and 111b are completely isolated from each other, a microscopic foreign particle 123 may adhere between lower capacitor electrodes 111a and 111b, as shown in FIG. 23. Such adherence of foreign particle 123 may not be detected by the wafer test, since lower capacitor electrodes 111a and 111b are not completely short-circuited. However, the presence of such a foreign particle 123 causes so-called micro-shorting, i.e., making the resulting semiconductor device defective after packaged as a product. Note that FIG. 23 is another schematic cross-section view for illustrating problems in the conventional semiconductor device.
As such, short-circuiting between lower capacitor electrodes due to an etching residue or a foreign particle is one cause of the problems in the semiconductor device, such as reduction of the yield and increase of the manufacturing cost. Accordingly, in such a semiconductor device that targets improvement of yield and reduction of manufacturing cost, it is strongly required to prevent occurrence of short-circuiting between capacitor electrodes, such as the lower capacitor electrodes as described above.
An object of the present invention is to provide a semiconductor device that can suppress occurrence of short-circuiting between capacitor electrodes, and a method of manufacturing the semiconductor device.
According to one aspect of the present invention, a semiconductor device includes two capacitor electrodes formed to be spaced from each other and including conductive impurities of a first conductivity type, and an electrode isolation film located between the two capacitor electrodes, and formed at the same layer as that of the two capacitor electrodes, while including conductive impurities of a second conductivity type which is different from the first conductivity type.
Thus, by introducing conductive impurities of the second conductivity type into a portion located between the two capacitor electrodes and formed at the same layer as that of the capacitor electrodes, the two capacitor electrodes can be electrically isolated without the step of etching or the like performed. This can prevent occurrence of short-circuiting between the capacitor electrodes due to an etching residue.
Specifically, an example is given in which a semiconductor memory device such as a DRAM is used as a semiconductor device, and n type conductive impurities such as phosphorus are included in the capacitor electrodes as the conductive impurities of the first conductivity type. Here, p type conductive impurities such as boron are included in the electrode isolation film located between the two capacitor electrodes, as the conductive impurities of the second conductivity type. When the capacitor electrodes are to store one of logic high or xe2x80x9cHxe2x80x9d data and logic low or xe2x80x9cLxe2x80x9d data, each capacitor electrode is set to have potentials of 2.0V and 0V, respectively. When such potentials are applied to the capacitor electrodes, a potential of e.g. xe2x88x921.0V is applied to the electrode isolation film. This can suppress current flowing between the two capacitor electrodes via the electrode isolation film, allowing electrical isolation between the two capacitor electrodes.
Furthermore, in the conventional semiconductor device, once the capacitor electrodes are short-circuited due to insufficient etching in the etching step or the like for isolating the capacitor electrodes from one another, it is difficult to recover the short-circuited portion to a normal state. In the semiconductor device according to the present invention, if conductive impurities of the second conductivity type are insufficiently introduced into the electrode isolation film to partially form a defective portion with no conductive impurities introduced, heat treatment may be applied that heats the semiconductor device in the step subsequent to the impurity-introducing step. This allows the conductive impurities to diffuse from the doped portion to the defective undoped portion in the electrode isolation film. Thus, in the semiconductor device according to the present invention, even if an undoped portion (a portion with no conductive impurities introduced) occurs in the step of introducing conductive impurities into the electrode isolation film, e.g., the implantation step, heat treatment or the like may be performed in the subsequent step to eliminate such an undoped portion. As a result, possibility can be lowered that the capacitor electrodes are short-circuited in the semiconductor device.
In the semiconductor device according to the present aspect, the two capacitor electrodes and the electrode isolation film may be formed by introducing conductive impurities of the first conductivity type and the second conductivity type, respectively, into one semiconductor film.
The semiconductor device according to the present aspect may include a potential determination part for determining the potential of the electrode isolation film.
Here, the potential of the electrode isolation film can arbitrary be changed. Thus, the potential of the electrode isolation film can be determined to be adapted to the potential set for the capacitor electrode, thereby preventing current from flowing through a junction (pn junction) between each capacitor electrode and the electrode isolation film. Therefore, the electrode isolation film allows electrical isolation between the two capacitor electrodes.
Further, when the present invention is applied to a concave capacitor, in which respective capacitor electrodes are arranged inside of a plurality of openings formed on an underlying film such as an interlayer insulation film, the electrode isolation film is arranged on the top surface of the underlying film located between the respective openings. Preferably, the electrode isolation film is formed to extend to the inside of the openings in the underlying film, such that the top surfaces of the capacitor electrodes are located at a sufficient distance below the top surface of the underlying film. Thus, even if a foreign particle is present at an upper part of an opening, it does not directly adhere to a capacitor electrode, but to the electrode isolation film. As a result, short-circuiting between the capacitor electrodes due to the presence of a foreign particle can be prevented.
In the semiconductor device according to the above aspect, each of the capacitor electrodes forming the concave capacitor may have a top surface, and the electrode isolation film may extend to the top surface of the capacitor electrodes.
Moreover, when the present invention is applied to a stacked capacitor, formation of a concave portion between the capacitor electrodes can be prevented, since the electrode isolation film is disposed between the capacitor electrodes. This cannot be achieved by the conventional semiconductor device, in which a conductor film (a film of the same layer as the film forming the capacitor electrodes) is removed by etching or the like from the space between the capacitor electrodes to isolate the two capacitor electrodes. Thus, a dielectric film formed on the capacitor electrodes, an upper capacitor electrode, an interlayer insulation film and the like may have relatively flat top surfaces. This can prevent breaking of interconnections or the like due to the shape of the top surface of the interlayer insulation film, when the interconnections or the like are formed to be laminated on the capacitor electrodes, i.e., breaking of interconnections or the like due to the presence of the concave portion described above can be prevented.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.